Thread scheduling in a system with multiple virtua
专利名称:Thread scheduling in a system with multiple
virtual machines
发明人:Hitoshi Suzuki,Koji Adachi申请号:US13859200申请日:20130409公开号:US09465610B2公开日:20161011
专利附图:
摘要:A semiconductor device includes an execution unit that executes an arithmeticinstruction, and a scheduler including multiple first setting registers each defining acorrespondence relationship between hardware threads and partitions, and which
generates a thread select signal on the basis of a partition schedule and a threadschedule. The scheduler outputs a thread select signal designating a specific hardwarethread, without depending on the thread schedule as the partition indicated by a firstoccupation control signal, according to a first occupation control signal output when theexecution unit executes a first occupation start instruction.
申请人:Renesas Electronics Corporation
地址:Kawasaki-shi JP
国籍:JP
代理机构:McGinn IP Law Group, PLLC
更多信息请下载全文后查看
因篇幅问题不能全部显示,请点此查看更多更全内容