ACPL-P454
High CMR High Speed Optocoupler
Data Sheet
Lead (Pb) FreeRoHS 6 fullycompliantRoHS 6 fully compliant options available;-xxxE denotes a lead-free productDescription
The ACPL-W454/P454 is similar to Avago Technologies other high speed transistor output optocouplers, but with shorter propagation delays and higher CTR. The ACPL-W454/P454 also has a guaranteed propagation delay difference (tPLH - tPHL). These features make the ACPL-W454/P454 an excellent solution to IPM inverter dead time and other switching problems.
The ACPL-W454/P454 CTR, propagation delays, and CMR are specified both for TTL load and drive conditions and for IPM (Intelligent Power Module) load and drive conditions. Specifications and typical performance plots for both TTL and IPM conditions are provided for ease of application.This diode-transistor optocoupler uses an insulating layer between the light emitting diode and an integrated photo detector to provide electrical insulation between input and output. Separate connections for the photodiode bias and output transistor collector increase the speed up to a hundred times over that of a conventional phototransistor coupler by reducing the base-collector capacitance.
Features
• Package Clearance/Creepage at 8mm (ACPL-W454)• Function Compatible with HCPL-4504• Surface Mountable in 6-pin stretched SO6
• Short Propagation Delays for TTL and IPM Applications• Very High Common Mode Transient Immunity: Guaran-teed 15 kV/µs at VCM = 1500 V• High CTR: >25% at 25°C
• Guaranteed Specifications for Common IPM Applica-tions• TTL Compatible
• Guaranteed AC and DC Performance Over Temperature: 0°C to 70°C• Open Collector Output
• Safety approval
UL Recognized 3750 Vrms for 1 minute (5000 Vrms for 1 minute for Option 020 devices) per UL1577 CSA Approved
IEC/EN/DIN EN 60747-5-2 Approved with VIORM = 1140 Vpeak (ACPL-W454) and VIORM = 891 Vpeak (ACPL-P454) for Option 060.
Functional Diagram
ANODE
16VCC
TRUTH TABLELEDVOONLOWOFFHIGHApplications
• Inverter Circuits and Intelligent Power Module (IPM) In-terfacing – Shorter propagation delays and guaranteed
(tPLH - tPHL) specifications. • High Speed Logic Ground Isolation - TTL/TTL, TTL/LTTL, TTL/CMOS, TTL/LSTTL
• Line Receivers
- High common mode transient immunity (>15 kV/µs for a TTL load/drive) and low input-output capacitance (0.6 pF).• Replace Pulse Transformers - Save board space and weight
• Analog Signal Ground Isolation
- Integrated photo detector provides improved linearity over phototransistors
NC25VO4GND
CATHODE3A 0.1 µF bypass capacitor between pins 4 and 6 is recommended.
Schematic
ICCANODE+1VFCATHODEÐ3SHIELD4GNDIO5IF6VCCVOCAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
ACPL-P454 and ACPL-W454 are UL Recognized with 3750 Vrms for 1 minute per UL1577 and are approved under CSA Component Acceptance Notice #5, File CA 88324.
Option
Part number
RoHSCompliant
-000E-500E
ACPL-P454 ACPL-W454
-020E-520E-060E-560E
Stretched SO-6
Package
Surface Mount
XXXXXX
Tape& Reel
X
UL 5000 Vrms/ 1 Minute
rating
IEC/EN/DIN EN 60747-5-
Quantity
100 per tube1000 per reel
X
XX
X
XX
100 per tube1000 per reel100 per tube1000 per reel
To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Combination of Option 020 and Option 060 is not available.Example 1:
ACPL-P454-560E to order product of Stretched SO-6 package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-2 Safety Approval in RoHS compliant.Example 2:
ACPL-P454-000E to order product of Stretched SO-6 package in tube packaging and RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Package Outline Drawings
ACPL-W454 (Stretched SO6, 8mm Clearance)
4.5801.27[.050]BSG0.38±0.127[.015±.005]123654+0.254 0.180+.010- .000Land Pattern Recommendation0.76[.030]12.65[.498]6.807
+0.127+.005.268 0- .0007˚45˚1.590±0.127[.063±.005]3.180±0.127[.125±.005]7˚1.91[.075]0.45[.018]0.20±0.10[.008±.004]0.750±0.250[0.0295±0.010]Dimensions in Millimeters [Inches]11.50±0.250[.453±.010]Coplanarity = 0.1mm [0.004 inches]
ACPL-P454 (Stretched SO6, 7mm Clearance)
4.580
+0.254 00.38±0.127[.015±.005]1.27[.050]BSG.180+.010- .0007.62.3006.81.2681.590±0.127[.063±.005]0.45.0187.00˚45.00˚A7.00˚1±.0.2503.180±0.127[.040±.010][.125±.005]0.20±0.109.7±0.250[.382±.010][.008±.004]
Land Pattern Recommendation10.7[.421]2.16[.085]7.00˚0.20[.008]7.00˚Dimensions in Millimeters [Inches]Coplanarity = 0.1mm [0.004 inches]Recommended Solder Reflow Thermal Profile
300PREHEATING RATE 3˚C + 1˚C/-0.5˚C/SEC.REFLOW HEATING RATE 2.5˚C ± 0.5˚C/SEC.PEAKTEMP.245˚CPEAKTEMP.240˚C200TEMPERATURE (˚C)160˚C150˚C140˚CPEAKTEMP.230˚C2.5˚C ± 0.5˚C/SEC.30SEC.3˚C + 1˚C/-0.5˚C30SEC.SOLDERINGTIME200˚C100PREHEATING TIME150˚C, 90 + 30 SEC.50 SEC.TIGHTTYPICALLOOSEROOMTEMPERATURE0050100TIME (SECONDS)
150200250Note: Non-halide flux should be used
Recommended Pb-Free IR Profile
tpTpTLTEMPERATURETsmaxTsmintsPREHEAT60 to 180 SEC.25t 25 ˚C to PEAKTIMENOTES:
THE TIME FROM 25˚C to PEAK TEMPERATURE = 8 MINUTES MAX.Tsmax = 200 ˚C, Tsmin = 150 ˚C
tL60 to 150 SEC.260 +0/-5 ˚C217 ˚CRAMP-UP3˚C/SEC. MAX.150 - 200 ˚CRAMP-DOWN6 ˚C/SEC. MAX.TIME WITHIN 5 ˚C of ACTUALPEAK TEMPERATURE20-40 SEC.Note: Non-halide flux should be used
4
Regulatory Information
The ACPL-W454/P454 are approved by the following organizations:IEC/EN/DIN EN 60747-5- (Option 060 only)Approval under:
IEC 60747-5-2 :1997 + A1:2002EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01
UL - Approval under UL 1577, component recognition program up to VISO = 3750 VRMS. File E55361.CSA - Approval under CSA Component Acceptance Notice #5, File CA 88324.
Insulation Related Specifications
W454
Parameter
Min External Air Gap(Clearance)
Min. External Tracking Path(Creepage)
Min. Internal Plastic Gap (Clearance)Tracking ResistanceIsolation Group(per DIN VDE 0109)
CTI
P454Value
780.08175
Symbol
L(IO1) L(IO2)
Value
880.08175 IIIa
Units
mm mm mm V
Conditions
Measured from input terminals to output terminalsMeasured from input terminals to output terminalsThrough insulation distance conductor to conductorDIN IEC 112/VDE 0303 Part 1Material Group DIN VDE 0109
5
IEC/EN/DIN EN 60747-5- Insulation Related Characteristics (Option 060 only)
Description
Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 450 Vrms for rated mains voltage ≤ 600 Vrms for rated mains voltage ≤ 1000 VrmsClimatic Classification
Pollution Degree (DIN VDE 0110/1.89)Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 secPartial Discharge < 5 pC,
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test, tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values
(Maximum values allowed in the event of a failure)Case TemperatureInput CurrentOutput Power
Insulation Resistance at TS, VIO = 500 V
VIORMVPR
Symbol ACPL-W454
I-IVI-IVI-IIII-IIII-II55/100/21211402137
ACPL-P454
I-IVI-IVI-IIII-III55/100/2128911670
Units
V peakV peak
VPR VIOTM
17106000
13366000
V peakV peak
TS
IS,INPUT PS,OUTPUT RS
175 230 600 ≤109
175 230 600 ≤109
°CmAmWW
* Refer to the optocoupler section of the Designer’s Catalog, under regulatory information (IEC/EN/DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles.
Absolute Maximum Ratings
Storage TemperatureOperating TemperatureAverage Input Current - IFPeak Input Current - IF
Peak Transient Input Current - IFReverse Input Voltage - VR (Pin3-1)Input Power Dissipation
Average Output Current - IO (Pin 5)Peak Output CurrentOutput Voltage - VO (Pin 5-4)Supply Voltage - VCC (Pin 6-4)Output Power DissipationSolder Reflow Temperature Profile
-55°C to +125°C-55°C to +100°C25 mA[1]
50 mA[2](50% duty cycle, 1 ms pulse width)1.0 A(≤1 ms pulse width, 300 pps)5 V45 mW[3]8 mA16 mA-0.5 V to 20 V-0.5 V to 30 V100 mW[4]
see Package Outline Drawings section
6
DC Electrical Specifications
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified. Parameter
Current
Transfer RatioCurrent
Transfer RatioLogic Low Output VoltageLogic High Output CurrentLogic Low Supply CurrentLogic High Supply CurrentInput Forward VoltageInput Reverse Breakdown Voltage
Temperature Coefficient of For-ward VoltageInput
Capacitance
Symbol
CTRCTRVOLIOH
Min
25212622
Typ.*
323435370.20.20.0030.01
Max.
60650.40.50.5150200121.71.8
Units
%%VµA
Test Conditions
TA = 25°CTA = 25°CTA = 25°CTA = 25°CTA = 25°C
VO = 0.4 VVO = 0.5 VVO = 0.4 VVO = 0.5 VIO = 3.0 mAIO = 2.4 mAVO = VCC= 5.5 VVO = VCC = 15.0 V
VO = open, VCC = 15 VIF = 16 mAVCC = 4.5 VIF = 12 mAVCC = 4.5 VIF = 16 mAVCC = 4.5 VIF = 0 mA
Fig.
1, 2, 4
Note
55
15
ICCLICCHVFBVR
5
500.020.021.51.5
µAµAVV
IF = 16 mA, VCC = 15 VTA = 25°CTA = 25°C IR = 10 µA
IF = 16 mA, VO = Open, IF = 16 mA
1111
3
DVF/DTA-1.6mV/°CIF = 16 mA
CIN60pFf = 1 MHz, VF = 0
*All typicals at TA = 25°C.
7
Switching Specifications
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specifiedParameter
PropagationDelay Time to Logic Low at Output
Symbol
tPHL
Min. Typ.* Max.
0.20.20.20.1
0.50.50.30.30.30.2
0.80.8
0.30.50.71.00.50.71.11.4
Units Test Conditions
µs
TA = 25°C
Pulse: f = 20 kHz, Duty Cycle = 10%IF = 16 mA, VCC = 5.0 V RL = 1.9 kW, CL = 15 pFVTHHL = 1.5 V
Pulse: f = 10 kHz, Duty Cycle = 50%IF = 12 mA, VCC = 15.0 VRL = 20 kW, CL = 100 pFVTHHL = 1.5 V
Pulse: f = 20 kHz, Duty Cycle = 10%IF = 16 mA, VCC = 5.0 VRL = 1.9 kW, CL = 15 pFVTHHL = 1.5 V
Pulse: f = 10 kHz, Duty Cycle = 50%IF = 12 mA, VCC = 15.0 VRL = 20 kW, CL = 100 pFVTHHL = 2.0 V
Pulse: f = 10 kHz, Duty Cycle = 50%IF = 12 mA, VCC = 15.0 VRL = 20 kW, CL = 100 pFVTHHL = 1.5 V VTHLH = 2.0VVCC = 5.0 V, RL = 1.9 kWCL = 15 pF, IF = 0 mAVCM = 1500 VP-P
VCC = 15.0 V, RL = 20 kWCL = 100 pF, IF = 0 mAVCM = 1500 VP-PVCC = 5.0 V, RL = 1.9 kWCL = 15 pF, IF = 16 mAVCM = 1500 VP-PVCC = 15.0 V, RL = 20 kWCL = 100 pF, IF = 12 mAVCM = 1500 VP-PVCC = 15.0 V, RL = 20 kWCL = 100 pF, IF = 16 mAVCM = 1500 VP-P
Fig.
6,8,9
Note
9
TA = 25°C
6,10-14
10
PropagationDelay Time to Logic High at Output
tPLHµsTA = 25°C6,8,99
TA = 25°C
6,10-14
10
Propagation Delay Difference Between Any 2 Parts
tPLH - tPHL
-0.4-0.715
0.30.330
0.91.3
µsµskV/µs
TA = 25°C
6,10-14
13
Common Mode |CMH|Transient Immu-nity at Logic High Level Output
TA = 25°C77,9
1530TA = 25°C78,10
Common Mode Transient Immu-nity at Logic Low Level Output
|CML|1530kV/µsTA = 25°C77,9
1530TA = 25°C78,10
1530TA = 25°C78,10
*All typicals at TA = 25°C.
8
Package Characteristics
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified. All typicals at TA = 25°C.Parameter
Input-Output MomentaryWithstand Voltage*Input-Output ResistanceInput-Output Capacitance
Symbol
VISORI-OCI-O
Min.
3750
Typ.Max.Units
Vrms
Test Conditions
RH ≤ 50%, t = 1 min, TA = 25°CVI-O = 500 Vdcf = 1 MHz; VI-O = 0 Vdc
Fig.Note
6,1266
5000 (For Option 020)
10120.6
WpF
* The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable).Notes:
1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C.2. Derate linearly above 70°C free-air temperature at a rate of 1.6mA/°C.3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current (IO), to the forward LED input current (IF), times 100.6. Device considered a two-terminal device: Pins 1 and 3 shorted together and Pins 4, 5 and 6 shorted together.
7. Under TTL load and drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V).
8. Under IPM (Intelligent Power Module) load and LED drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable dVCM/dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 3.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/dt on the trailing edge of the common mode pulse signal,VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 1.0 V).9. The 1.9 kW load represents 1 TTL unit load of 1.6 mA and the 5.6 kW pull-up resistor.10. The RL = 20 kW, CL = 100 pF load represents an IPM (Intelligent Power Mode) load.11. Use of a 0.1 µF bypass capacitor connected between pins 4 and 6 is recommended.
12. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for 1 second (leakage detection current limit, II-O ≤ 5 µA); each optocoupler with option 020 is proof tested by applying an insulation test voltage ≥ 6000 VRMS for 1 second (leakage detection current limit, II-O ≤ 5 µA).
13. The difference between tPLH and tPHL, between any two ACPL-W454/P454 parts under the same test condition. (See Power Inverter Dead Time and Propagation Delay Specifications section).
IF - FORWARD CURRENT - mA35 mA30 mA25 mANORMALIZED CURRENT TRANSFER RATIOT = 25 ˚CA10V = 5.0 VCCIO - OUTPUT CURRENT - mA40 mA1.51000100101.00.10.01
IF+VF-1.0
T = 25˚CA5
20 mA15 mA10 mA0.5
0
I = 5 mAF010VO - OUTPUT VOLTAGE - V
200.0
NORMALIZEDIF = 16 mAVO = 0.4 VVCC = 5.0 VTA = 25 ˚C02468101214161820222426IF - INPUT CURRENT - mA
0.001
1.11.21.31.41.51.6VF - FORWARD VOLTAGE - VOLTS
Figure 1. DC and Pulsed Transfer Characteristics.Figure . Current Transfer Ratio vs. Input Current.Figure . Input Current vs. Forward Voltage.
NORMALIZED CURRENT TRANSFER RATIO1.1
IOH - LOGIC HIGH OUTPUT CURRENT - nA10410310210110010-1
10-2
-60-40-201.0
IF = 0 mAVO = VCC = 5.0 V0.9
NORMALIZEDIF = 16 mAVO = 0.4 VVCC = 5.0 VTA = 25 ˚C0.80.7
0.6
-60-40-20020406080100120TA - TEMPERATURE - ˚C020406080100120TA - TEMPERATURE - ˚C
Figure 4. Current Transfer Ratio vs. Temperature.
Figure 5. Logic High Output Current vs. Tempera-ture.
IF0VOVTHHLVCCVTHLHVOLtPHLtPLHACPL-W454/P454PULSEGEN.ZO = 50Ωtr = 5 nsIF126RL50.1µFIF MONITOR100 Ω34CLVOVCCFigure 6. Switching Test Circuit.
ACPL-W454/P454VCM0 V10 V10%tr90%90%10%tfVCCABIF16RLVCC250.1µFVOVOSWITCH AT A: I = 0 mAFVOSWITCH AT B: I = 12 mA, 16 mAF3VFF4CL+VCM-VOLPULSE GEN.Figure 7. Test Circuit for Transient Immunity and Typical Waveforms.
10
0.500.45tp - PROPAGATION DELAY - µstp - PROPAGATION DELAY - µs0.400.350.300.250.200.15
tPLHtPHL0.80.60.40.20.0024 tPHL IF = 10 mAIF = 16 mAtPLHtp - PROPAGATION DELAY - µsVCC = 5.0 VRL = 1.9 kCL = 15 pFVTHHL = VTHLH = 1.5 V10% DUTY CYCLE1.4
VCC = 5.0 VT1.2A = 25 ˚CCL = 15 pF1.0VTHHL = VTHLH = 1.5 V10% DUTY CYCLE2.62.42.22.01.81.61.41.21.00.80.60.40.20.0
VCC = 5.0 VTA = 25 ˚CCL = 100 pFVTHHL = 1.5 VVTHLH = 2.0 V50% DUTY CYCLEtPLHIF = 10 mAIF = 16 mAtPHLIF = 10 mAIF = 16 mA0204060801001200.10
-60-40-20TA - TEMPERATURE - ˚C
68101214161820RL - LOAD RESISTANCE - k
02468101214161820RL - LOAD RESISTANCE - k
Figure 8. Propagation Delay Time vs. Tempera-ture.Figure . Propagation Delay Time vs. Load Resis-tance.Figure 10. Propagation Delay Time vs. Load Resistance.
1.11.0tp - PROPAGATION DELAY - µstp - PROPAGATION DELAY - µs0.90.80.70.60.50.4
tp - PROPAGATION DELAY - µsVCC = 15.0 VRL = 20 kCL = 100 pFVTHHL = 1.5 V VTHLH = 2.0 V50% DUTY CYCLEIF = 10 mAIF = 16 mAtPLH1.81.61.41.21.00.80.60.40.20.0
0VCC = 15.0 VTA = 25 ˚CCL = 100 pFVTHHL = 1.5 VVTHLH = 2.0 V50% DUTY CYCLEtPHL3.53.02.52.01.51.00.50.0
0tPLHVCC = 15.0 VTA = 25 ˚CRL = 20 kVTHHL = 1.5 VVTHLH = 2.0 V50% DUTY CYCLEtPLHtPHLtPHL0.3
-60-40-20IF = 10 mAIF = 16 mA5101520253035404550RL- LOAD RESISTANCE - k
IF = 10 mAIF = 16 mA2004006008001000020406080100120TA - TEMPERATURE - ˚C
CL- LOAD CAPACITANCE - pF
Figure 11. Propagation Delay Time vs. Tempera-ture.Figure 1. Propagation Delay Time vs. Load Re-sistance.Figure 1. Propagation Delay Time vs. Load Capacitance.
1.21.11.0tp - PROPAGATION DELAY - µs0.90.80.70.60.50.40.30.2
tPHLtPLHTA = 25 ˚CRL = 20 kCL = 100 pFVTHHL = 1.5 VVTHLH = 2.0 V50% DUTY CYCLEIF = 10 mAIF = 16 mA1011121314151617181920VCC- SUPPLY VOLTAGE - V
Figure 14. Propagation Delay Time vs. Supply
Voltage.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2005-2008 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0253ENAV02-1307EN - May 27, 2008
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