Error detecting code calculation circuit, error de

专利名称：Error detecting code calculation circuit,

error detecting code calculation method,and recording apparatus

发明人：Takeo Ariyama申请号：US11495715申请日：20060731

公开号：US20070043999A1公开日：20070222

专利附图：

摘要：The recording apparatus adds EDC to user data and transfers the EDC-addeddata to the scrambler in a sequence different from the coding direction Q. Though the

processing data is added at an end in the direction Q, it is inserted at middle in thedifferent sequence. Therefore, in order to transfer the EDC-added data in the differentsequence, the EDC generator calculates an EDC intermediate value from an expectedvalue of a latter part of an even number sector. Then, the EDC generator receives theuser data in the different sequence and calculates EDC from expected values of the firsthalf of the even number sector and an odd number sector and the EDC intermediatevalue. The expected value is an error detecting value of code string that has the samenumber of bits as the EDC-added data and a corresponding bit in the sequence of thedirection Q is 1 and other bits are 0.

申请人：Takeo Ariyama

地址：Kanagawa JP

国籍：JP

更多信息请下载全文后查看