BRAVO-XSA9027
32 Bit USB Audio Controller
v1.2
SAVITECH Corporation
The information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
BRAVO-X SA9027USB Audio Controller Features■ USB 2.0 Full-Speed Compliant■ Certificated•USB IF logo and Microsoft WHQL logo certificated■ Support APPLE feedback mode by the native driver (No other driver required)■ Incredible Bravo sound quality supported by Savitech innovative Bravo Tech*1•BravoA Tech*1 supporting Jitter-less outputs using local clock in Async-mode•BravoD Tech*2 supporting advanced DSD audio stream playback■ Isochronous input and output endpoints for recording and playback■ One interrupt endpoint for HID■ Support resolutions up to 32-bit and sampling rates up to 96KHz ■ One I2S input pairs and I2S output pairs•Independent sample rates for each pairs•32/ 44.1/ 48/ 88.2/ 96 KHz sampling rates•16/24/32 bit resolution■ Built in IEC60958 professional S/PDIF TX and SPDIF RX,•AES/EBU supported•Stereo SPDIF Input and SPDIF Output•32/ 44.1/ 48/ 88.2/ 96 KHz sampling rates•16/24 bit resolution■ Control and I/O•One I2C bus is designed in slave mode to configure the system and access real-time system information, including Resolution, Sampling Rate, SPDIF TX and SPDIF RX info•12-pin GPIOs■ 48-pin TQFP packages *1 Bravo Tech included: 1.*1BravoA Tech: Async mode 2.*2BravoD Tech: DSD2PCM playback OverviewThe SA9027 is a high performance up to 32bit USB Full-Speed compliant audio steaming controller. It features one stereo playback and recording pairs and one IEC60958 S/PDIF receive and transmit streaming pair. The SA9027 is ideal for both one stereo-in and one stereo-out professional digital audio interface applications. Its resolution and sampling rate can be configurable with 16/24/32 bit and 32/ 44.1/ 48/ 88.2/96 KHz respectively.www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
Application Block diagramExt. ClockSamplingRate SamplingRate MCLKMCLKLRCLKLRCLKBRAVO-XSV9027SCLKSDI/SDODAC/ADCBRAVO-XSV9027SCLKSDI/SDODAC/ADCPin Assignment1234567101112DASYNCDADATDMCLK0VDD33VSSDASCLKADSYNCADDATVDD18GPIO9AMCLKADSCLK131415161718192021222324GPIO7SCLSDARESETNSCLSSDASVDD18TEST1GPIO5SARVDD33VDD18O252627282930313233343536VSSTEST2SPDTXGPIO6GPIO10GPIO3GPIO1VSSSPDRXDPDMVDD3337383940414243444748XIXOVSSVDD18GPIO0GPIO2GPIO4GPIO8VDD33VSSMODEGPIO11www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
Pin DescriptionsPinName1DASYNC2DADAT3DAMCLK4VDD335VSS6DASCLK7ADSYNC8ADDAT9VDD1810GPIO911ADMCLK12ADSCLK13GPIO714SCL15SDA16RESETN17SCLS18SDAS19VDD1820TEST121GPIO522SAR23VDD3324VDD18OI/O/PI/OOI/OPPI/OI/OIPI/OI/OI/OI/OI/OI/OII/OI/OPI/OI/OIPPDescriptionI2S L/R sync clock: Input in slave mode and output in master mode.I2S data outputI2S master clock: Input in slave mode and output in master mode.3.3V power supplyGroundI2S Bit clock output: Input in slave mode and output in master mode.I2S L/R sync clock: Input in slave and output in master.I2S data input1.8V power supplyGeneral purpose Input/OutputI2S master clock: Input in slave mode and output in master mode.I2S Bit clock: Input in slave mode and output in master mode.General purpose Input/OutputI2C-master clock I2C-master dataReset control pin. Active in “Low” state.I2C-slave clockI2C-slave data1.8V power supplyFT test pin. Need pull-down.General purpose Input/OutputSAR ADC input3.3V power supplyInternal 1.8V LDO outputwww.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
PINNAME25VSS26TEST227SPDTX28GPIO629GPIO1030GPIO331GPIO132VSS33SPDRX34DP35DM36VDD3337XI38XO39VSS40VDD1841GPIO042GPIO243GPIO444GPIO845VDD3346VSS47MODE48GPIO11I/O/PPI/OOI/OI/OI/OI/OPII/OI/OPIOPPI/OI/OI/OI/OPPII/OGroundFT test pin. Need pull-down.S/PDIF TX interfaceDescriptionGeneral purpose Input/OutputGeneral purpose Input/OutputGeneral purpose Input/OutputGeneral purpose Input/OutputGroundS/PDIF RX interfaceUSB interface DPUSB interface DM3.3V power supplyX’tal clock inputX’tal clock outputGround1.8V power supplyGeneral purpose Input/OutputGeneral purpose Input/OutputGeneral purpose Input/OutputGeneral purpose Input/Output3.3V power supplyGroundFT test pin. Need pull-hign.General purpose Input/Outputwww.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
I2S / SPDIF and Audio Data Streams Function BlocksI2S OutputPlayback FIFO ControlPlayback Volume ControlS/PDIF TXUSB 2.0Full SpeedInterfaceI2S InputRecord FIFOControlRecording Volume ControlMUXS/PDIF RXI2S FormatAs shown in Figure, the Standard I2S bus has three lines.1). Continuous Serial Clock(SCLK) , 2). Word Select (LRCLK), 3).Serial Data (DAT). The device generating SCLK and LRCLK is www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
GPIOs FunctionSA9027 provides 12 GPIOs (GPIO0 ~ GPIO11). Each has its individual function in normal mode.GPIO0~6 are used for HID Report. GPIO7~11 are used for audio stream status reporting. GPIOsGPIO0GPIO1GPIO2GPIO3GPIO4GPIO5GPIO6GPIO9 - GPIO7Volume up (level trigger)DescriptionVolume down (level trigger)Mute / Un-Mute (edge trigger)Play / Pause (edge trigger)Scan next track (edge trigger)Scan previous track (edge trigger)Stop (edge trigger)Sampling rate encoded000: 48KHz001: 44.1KHz010: 32KHz100: 88.2KHz101: 96KHz16/24 bit resolution0: 16Bit1: 24Bit or 32Bit (included 24Bit when enable 32bit feature)Playback status0: playback OFF1: playback ONGPIO10GPIO11www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
Volume Control and Soft mute FunctionFor playback stream, SA9027 can adjust volume gain range from 0dB to -55fB and mute. SA9027 also support disable “Volume Control Function” by external EEPROM which need USB Descriptor Software Tool. For “Soft mute”, SA9027 support DC detection for soft mute / unmute. This function need enabled by external EEPROM which need USB Descriptor Software Tool. If the data is a constant value for 8192 samples, a ramp down process begins to attenuate the volume from the current setting down to mute. When the data changes, a ramp up process begins to amplify the volume from mute up to the original setting. www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
I2C Slave FunctionSA9027 provided an I2C slave function which is used for CPU to read informations or program some registers.This mode need to enabled by EEPROM that need USB Descriptor software tool. Default setting is disabled.Set SPDIF TX statusS/PDIF TX control register 0Offset 0Length: 1 byte Bit7:321TypeRWRWRWResetDescription0Reserved0S/PDIF TX control registers (offset 0 to 2) enable1: Enable0: Disable 01: Force TX data to 0 when Validity (bit 0) is 1 and bit 1 in offset 6h is 0 (PCM data)0: Do not change data when Validity is 1. (default)This bit is for the SCMS compatibility issues sometimes found when interfacing with MD devices.0Validity: This bit affects the “Validity Flag”, bit 28 transmitted in each subframe, and enables the S/PDIF transmitter to maintain connection during error or mute conditions.0RWwww.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
S/PDIF TX control register 1Offset 1Length: 1 byte Bit7:4TypeRWResetDescription0sS/PDIF Sample Rate For Channel Status(Byte 3, bit [3:0] for Consumer Mode.)(Byte 0, bit [7:6] for Professional Mode.)4’b0011: 32KHz4’b0000: 44.1KHz4’b0010: 48KHz4’b1000: 88.2KHz4’b1010: 96KHzNote: In professional mode, only 44.1K, 48K & 32K are reported in the Channel Status bit. ( Byte 0, bit [7:6] )2’b01: 44.1KHz2’b10: 48KHz2’b11: 32KHz2’b00: OthersThis indicates other sample rates, not representable in byte 0 bits 6–7In professional mode, 88.2K, 96K are reported in the Channel Status bit ( Byte 4, bit [6:3] )4’b0000: Not indicated (default)4’b0010: 96KHz4’b1010: 88.2KHzPre-emphasis0: None – 2 channel audio1: 50/15us – 2 channel audio2RW0Copyright (Copy)1: Non-copyright0: Copyright1RW0Reserved. 0RW0Professional mode (PRO)1: Professional mode0: Consumer modeS/PDIF TX control register 2Offset 2Length: 1 byte Bit76:0TypeRWRWReset0Generation Level (L)0Category code[6:0]Description3RW0www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
Get SPDIF RX statusS/PDIF RX control registers 0Offset 3Length: 1 bytes Bit76:4TypeROROResetDescription0Reserved001S/PDIF Sample Rate Decoded by Hardware3’b001 : 44.1K3’b000: 48K3’b100: 88.2K3’b101: 96K3’b010: 32K0sS/PDIF Sample Rate reported from channel status bit4’b0000: 44.1KHz4’b0010: 48KHz4’b0011: 32KHz4’b1000: 88.2KHz4’b1010: 96KHz3:0ROS/PDIF RX control registers 1Offset 4Length: 1 bytes Bit763210TypeRWROROROROROROROResetDescription0Reserved0Lock Status1: S/PDIF RX input is locked0: S/PDIF RX input is unlocked0Validity0Generation Level0Pre-emphasis0Copyright1: Non-copyright0: Copyright0Non-Audio Samples1: Non-PCM audio samples0: Linear PCM samples0Professional mode1: Professional mode0: Consumer modewww.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
S/PDIF RX control registers 2Offset 5Length: 1 bytes Bit76:0TypeRWROReset0Reserved0Category codeDescriptionSampling rate and resolutionSampling Rate and resolution register Offset 6Length: 1 bytes Bit7:5TypeROResetDescription000Record stream sampling rate 000: 48KHz001: 44.1KHz010: 32KHz100: 88.2KHz101: 96KHz0Record stream resolution0: 16-bit1: 24-bit000Playback stream sampling rate000: 48KHz001: 44.1KHz010: 32KHz100: 88.2KHz101: 96KHz0Playback stream resolution0: 16-bit1: 24-bit43:1RORO0ROwww.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
External EEPROM Support After power up, the I2C interface will read the external EEPROM to load customer specific descriptor data. The hardware automatically detects if there’s an EEPROM populated on the board. If there’s a valid ACK response from the EEPROM, SA9027 continues to read the EEPROM to decide whether the EEPROM has been programmed correctly. If the data match, the EEPROM data content is considered valid, and the hardware will continue to read data for USB HOST request. Otherwise it switches automatically and read the internal ROM data.www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
www.savitech-ic.comThe information shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission
TQFP-48 MECHANICAL DATA
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Information furnished is believed to be accurate and reliable. However, SAVITECH assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SAVITECH. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SAVITECH products are not authorized for use as critical components in life support devices or systems without express written approval of SAVITECH.
The SAVITECH logo is a registered trademark of Savitech.All other names are the property of their respective owners© 2011 Savitech Corporation - All Rights Reserved
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