Synchronizing device for high data rates

专利名称：Synchronizing device for high data rates发明人：BRUECKNER, ROLAND, DIPL.-ING.申请号：EP90116985.4申请日：19900904公开号：EP04196A2公开日：19910403

专利附图：

摘要：Synchronisation device for high-rate input data (DE) with a delay line to

generate a plurality of clock signals (CK1 to CKn) shifted in relation to one another, with aregister line (RK), comprising a plurality of register trigger circuits (KA1 to KAn), whichserves to sample the input signal (DE), with a phase register (PR), in which the logic states

of the clock signals (CK1 to CKn) from one edge of the input data are stored and with acontrol logic (SL) which selects the appropriate register trigger circuit and the associatedclock signal to sample the input data (DE).

申请人：SIEMENS AKTIENGESELLSCHAFT

地址：WITTELSBACHERPLATZ 2; W-8000 MUENCHEN 2,Wittelsbacherplatz 2 D-80333München DE

国籍：DE

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