ISD15D00YYI, 规格书,Datasheet 资料

ISD15D00 TABLE OF CONTENTS 1 2 3 4 5 6 GENERAL DESCRIPTION .......................................................................................................... 3 FEATURES................................................................................................................................. 3 BLOCK DIAGRAM ...................................................................................................................... 5 PINOUT CONFIGURATION ........................................................................................................ 6 4.1 QFN-32 .................................................................................................................................................... 6 PIN DESCRIPTION ..................................................................................................................... 7 ELECTRICAL CHARACTERISTICS ...........................................................................................10 6.1 OPERATING CONDITIONS ........................................................................................................................ 10 6.2 DC PARAMETERS ................................................................................................................................... 11 6.3 AC PARAMETERS ................................................................................................................................... 12 6.3.1 Inputs ............................................................................................................................................. 12 6.3.2 Outputs ........................................................................................................................................... 13 6.3.3 SPI Timing ..................................................................................................................................... 16 6.3.4 I2S Timing ...................................................................................................................................... 17 7 8 9 10 APPLICATION DIAGRAM ..........................................................................................................19 PACKAGE SPECIFICATION ......................................................................................................21 8.1 QFN-32 (5X5 MM^2, THICKNESS 0.8MM ,PITCH 0.5 MM) .................................................................. 21 REVISION HISTORY ..............................................................................................................23 ORDERING INFORMATION ......................................................................................................22 - 2 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 1 GENERAL DESCRIPTION ®The ISD15D00 is a digital ChipCorder featuring digital compression, comprehensive memory management, and integrated analog/digital audio signal paths. The ISD15D00 utilizes serial flash 2memory to provide non-volatile audio playback for a two-chip solution. The ISD15D00 provides an IS digital audio interface, faster digital programming, higher sampling frequency, and a signal path with SNR 80dB. 22The ISD15D00 can take digital audio data via IS or SPI interface. When IS input is selected, it will replace the analog audio inputs and will support sample rates of 32, 44.1 or 48 kHz depending upon clock configuration. When SPI interface is chosen, the sample rate of the audio data sent must be one of the ISD15D00 supported sample rates. The ISD15D00 has inbuilt analog audio inputs, analog audio line driver, and speaker driver output. The analog audio input, Aux-in, has a fixed gain configured by SPI command. Aux-in can directly feed-through to the analog outputs; it can also mix with the DAC output and then feed-through to the analog outputs. Analog outputs are available in two forms: (1) Aux-out is an analog single-ended voltage output; (2) Class-AB BTL (bridge-tied-load) is an analog differential voltage output. Class-AB BTL delivers 0.7-watt output power at VCCSPK = 4.5V. Class-D PWM direct-drive is also available, which delivers 0.9-watt output power at VCCSPK = 4.5V. 2 • FEATURES External Memory: o The ISD15D00 supports the following flash: Manufacturer Winbond Numonyx MXIC Family 25X 25Q 25P 25PX 25PE 25L / 25V JEDEC ID EF 30 1X EF 40 1X 20 20 1X 20 71 1X 20 80 1X C2 20 1X o The addressing ability of ISD15D00 is up to 128Mbit, which is 64-minute playback time based on 8kHz/4bit ADPCM. o Inbuilt 3V voltage regulator to provide power source to the external flash memory • Fast Digital Programming o Programming rate can go up to 1Mbits/second mainly limited by the flash memory write rate. • Memory Management o Store pre-recorded audio (Voice Prompts) using high quality digital compression o Use a simple index-based command for playback o Execute pre-programmed macro scripts (Voice Macros) designed to control the configuration of the device and play back Voice Prompts sequences. • Sample Rate o Seven sampling frequencies are available for a given master sample rate. For example, the sampling frequencies of 4, 5.3, 6.4, 8, 12.8, 16 and 32kHz are available when the device is clocked at a 32kHz master sample rate. 2o For IS operation, 32, 44.1 and 48kHz master sample rates are available with playback sampling frequencies scaling accordingly. • Compression Algorithms o For Pre-Recorded Voice Prompts 󰂃 µ-Law: 6, 7 or 8 bits per sample - 3 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 Differential µ-Law: 6, 7 or 8 bits per sample PCM: 8, 10 or 12 bits per sample Enhanced ADPCM: 2, 3, 4 or 5 bits per sample Variable-bit-rate optimized compression. This allows best possible compression given a metric of SNR and background noise levels. Oscillator o Internal oscillator with internal reference: 2.048 MHz o Internal oscillator with external resistor: 2.048 MHz with Rosc = 80kohm 2o IS bit clock input Inputs o Aux-in: Analog input with 2-bit gain control configured by SPI command Outputs o PWM: Class-D speaker driver to directly drive an 8Ω speaker or buzzer 󰂃 Deliver 0.9-watt output power at VCCSPK = 4.5V o Aux-out: an analog single-ended voltage output o Class-AB BTL: an analog differential voltage output 󰂃 Deliver 0.7-watt output power at VCCSPK = 4.5V 󰂃 Class-AB BTL can directly drive an 8Ω speaker or buzzer 󰂃 Class-AB BTL can drive an 8Ω speaker or buzzer via an external amplifier I/Os o SPI interface: MISO, MOSI, SCLK, SSB for commands and digital audio data 22222o IS interface: IS_CLK, IS_WS, IS_SDI, IS_SDO for digital audio data o 8 GPIO pins: 2󰂃 4 GPIO pins share with IS 󰂃 4 GPIO pins share with SPI Interface 󰂃 GPIO pins can trigger Voice Macro for a pushbutton application 8-bit Volume Control set by SPI command for flexible mixing Operating Voltage: 2.7 ~ 5.5V Standby Current: 1uA typical Package: o Green QFN-32 Temperature Options: o Industrial: -40°C to 85°C 󰂃 󰂃 󰂃 󰂃 • • • • • • • • • - 4 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 3 BLOCK DIAGRAM Av = 0, 3, 6, 9dBAUXINAUXINSUM2GPIO7 /SDIGPIO6 /SCKGPIO5 /WSGPIO4 /SDO+AUX_MUXI2S InterfaceDigital Signal Path:Digital FiltersResamplingVolume ControlDACAUXOUTAUXOUTPWMControlSPK+_MUXSPK+De-CompressionSPK-_MUXSPK-SCLKSSBGPIO1 / MISOGPIO0 / MOSIGPIO3 / INTBGPIO2 / RDY/BSYBSPI InterfaceMemory Management and Command InterpreterFlash Memory ControllerFCLKFCSBFDIFDO Figure 3-1 ISD15D00 Block Diagram - 5 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 4 4.1 PINOUT CONFIGURATION QFN-32 IS_SCK / GPIO61I2S_WS / GPIO52I2S_SDO / GPIO43VSSD4VCCD5VREG67823231302928272625242322ISD15D002120191891011121314151716 Figure 4-1 ISD15D00 QFN-32 Pin Configuration. - 6 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 5 PIN DESCRIPTION Pin Name I/O Function Pin Number QFN-32 32 GPIO7 / 2IS_SDI GPIO6 / 2IS_SCK GPIO5 / 2IS_WS GPIO4 / 2IS_SDO VSSD VCCD VREG I/O A GPIO pin. By default this pin is a pull-high input. 2Can be configured as Serial Data Input of the IS interface. A GPIO pin. By default this pin is a pull-high input. Can be configured as Clock input in slave mode or clock output in master mode. This pin can be configured as an external clock buffer if I2S is not used. A GPIO pin. By default this pin is a pull-high input. Can be configured as Word Select (WS) input in slave mode or WS output in master mode. A GPIO pin. By default this pin is a pull-high input. 2Can be configured as Serial Data Output of the IS Interface. Digital Ground. Digital power supply. A 1.8V regulator to supply the internal logic. A minimum 1uF capacitor with low ESR<0.5OHM should be connected to this pin for supply decoupling and stability. Master-In-Slave-Out. Serial output from the ISD15D00 to the host. This pin is in tri-state when SSB=1. Can be configured as GPIO1. Serial Clock input to the ISD15D00 from the host. Slave Select input to the ISD15D00 from the host. When SSB is low device is selected and responds to commands on the SPI interface. Master-Out-Slave-In. Serial input to the ISD15D00 from the host. Can be configured as GPIO0. In PWM mode: Digital Power for the PWM Driver. Deliver 0.9-watt output power at VCCSPK = 4.5V. Or, In Class-AB mode: Analog Power for the Class-AB output. Class-AB BTL delivers 0.7-watt output power at VCCSPK = 4.5V. 1 I/O 2 I/O 3 I/O 4 5 6 I I O 7 MISO / GPIO1 SCLK SSB MOSI / GPIO0 VCCSPK O 8 9 10 11 I I I I - 7 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 Pin Number QFN-32 12 Pin Name I/O Function SPK+ O PWM driver positive output. This SPK+ output, together with SPK- pin, provide a differential output to drive 8Ω speaker or buzzer. During power down this pin is in tri-state. Or, can be configured as Class-AB BTL which, together with SPK- pin, provides a differential voltage output. Or, can be configured as a Class-AB single-ended output. In PWM mode: Digital Ground for the PWM Driver. Or, In Class-AB mode: Analog Ground for the Class-AB output. PWM driver negative output. This SPK- output, together with SPK+ pin, provides a differential output to drive 8Ω speaker or buzzer. During power down this pin is tri-state. Or, can be configured as Class-AB BTL which, together with SPK+ pin, provides a differential voltage output. Or, can be configured as a Class-AB single-ended output. In PWM mode: Digital Power for the PWM Driver. Deliver 0.9-watt output power at VCCSPK = 4.5V. Or, In Class-AB mode: Analog Power for the Class-AB output. Class-AB BTL delivers 0.7-watt output power at VCCSPK = 4.5V. Active low interrupt request pin. This pin is an open-drain output. Can be configured as GPIO3. An output pin to report the status of data transfer on the SPI interface. “High” indicates that ISD15D00 is ready to accept new SPI commands or data. Can be configured as GPIO2. Applying power to this pin will reset the chip. (A high pulse of 50ms or more will reset the chip.) Serial data output of the external serial flash interface. Connects to data input (DI) of external serial flash. Serial data CLK of the external serial flash interface. Serial data input to external serial flash interface. Connects to data output (DO) of external flash memory. Chip Select Bar of the external serial flash interface. Digital power supply for the external flash memory. A minimum 1uF capacitor with low ESR<0.5OHM should be connected to this pin for supply decoupling and stability. Refer to the application diagram. 13 VSSSPK I 14 SPK- O 15 VCCSPK I 16 17 INTB / GPIO3 RDY/BSYB / GPIO2 O O 18 19 20 21 22 23 RESET FDO FCLK FDI FCSB VCCF I O O I O O - 8 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 Pin Number QFN-32 24 Pin Name I/O Function VCCFS I Digital power supply for the inbuilt voltage regulator for the external flash memory. A 0.1uF capacitor should be connected to this pin for supply decoupling and stability. Refer to the application diagram. The CLK_CFG register determines one of the following configuration: A resistor connected to GND as a reference current to the internal oscillator. Aux Out. This pin is an analog voltage output. If AUXOUT is not used, this pin should be left unconnected. Analog power supply pin. Analog ground pin. Middle voltage reference for the swing of analog/digital audio outputs. A 4.7uF capacitor should be connected to this pin for supply decoupling and stability. Auxiliary input with the gain set by SPI command If Aux-in is not used, this pin should be left unconnected. This pin should be left unconnected. 25 XTALIN I 26 27 28 29 Aux-out VCCA VSSA VMID O I I O 30 31 Aux-in NC I - 9 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 6 ELECTRICAL CHARACTERISTICS 6.1 OPERATING CONDITIONS OPERATING CONDITIONS (INDUSTRIAL PACKAGED PARTS) CONDITIONS Operating temperature range (Case temperature) Digital Supply voltage (VCCD) Digital Ground voltage (VSSD) Analog Supply voltage (VCCA) Analog Ground voltage (VSSA) Speaker Supply voltage (VCCSPK) [3] Speaker Ground voltage (VSSSPK) Flash Source Supply voltage (VCCFS) – to regulate VCCF Flash Source Supply voltage (VCCFS) – tied to VCCF Flash Supply voltage - (VCCF) – regulated from VCCFS Flash Supply voltage - (VCCF) [4] – tied to VCCFS NOTES: [1] VCCD 2.7 ~ 5.5V; No restrictions with respect to VCCA and VCCSPK. [2] VSSD = VSSA = VSSSPK [3] In Class-AB mode: VCCSPK must equal VCCA. Otherwise: VCCSPK ≥VCCA. [4] If VCCFS is guaranteed to be below 3.6V (or upper flash supply limit), then VCCF should be tied to VCCFS. VALUES -40°C to +85°C +2.7V to +5.5V 0V +2.7V to +5.5V 0V +2.7V to +5.5V 0V [4][4][2][1][2][3][2]+2.7V to +5.5V +2.25V to +3.6V +2.4V to +3.0V +2.25V to +3.6V [4] Figure 6-1 VCCF vs. VCCFS – VCCF is regulated internally from VCCFS[4] - 10 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 6.2 DC PARAMETERS SYMBOL VCCD VCCA VCCSPK VCCFS MIN 2.7 2.7 2.7 2.7 2.25 Flash Supply Voltage (refer to Figure 6-1) VCCF 2.25 Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage INTB Output Low Voltage Playback Current Standby Current Input Leakage Current Notes: [1] PARAMETER Digital Supply Voltage Analog Supply Voltage Speaker Supply Voltage Flash Source Supply Voltage TYP [1] VCCFS-0.3 3.0 1 ±1 MAX 5.5 5.5 5.5 5.5 3.6 UNITS V V V V CONDITIONS to regulate VCCF tied to VCCF regulated from VCCFS VCCFS = 2.7 ~ 3.3V V 3.6 0.3xVCCD VCCD 0.3xVCCD VCCD 0.4 30 10 V V V V V mA µA µA regulated from VCCFS VCCFS = 3.3 ~ 5.5V tied to VCCFS IOL = 1mA IOH = -1mA Force VCCD VIL VIH VOL VOH VOH1 IDD_Playback ISB IIL VSSD-0.3 0.7xVCCD VSSD-0.3 0.7xVCCD Conditions VCCD=VCCA=VCCSPK=VCCFS=3V, TA=25°C unless otherwise stated - 11 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 6.3 AC PARAMETERS 6.3.1 Inputs AUX-IN: Conditions: VCCD = 3.3V, VCCA = VCCSPK = 5V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Parameter Symbol Comments/Conditions Min Gain = 0dB Guaranteed Monotonic 0 Typ 1.0 0 3 21 27 33 40 Max 9 Units Vrms dBV dB dB kΩ kΩ kΩ kΩ dB Auxiliary Analog Inputs (AUXIN) 1Full scale input signal AUX Programmable gain AUX programmable gain step size Input resistance Aux-in Gain Accuracy Parameter AAUX(GA) Aux direct-to-out path, only Input gain = +9.0dB Input gain = +6.0dB Input gain = +3.0dB Input gain = 0dB -0.5dB +0.5dB Conditions: VCCD = 3.3V, VCCA = VCCSPK = 3.3V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Symbol Comments/Conditions Min Gain = 0dB Guaranteed Monotonic 0 Typ 1.0 0 3 21 27 33 40 Max 9 Units Vrms dBV dB dB kΩ kΩ kΩ kΩ dB Auxiliary Analog Inputs (AUXIN) 1Full scale input signal AUX Programmable gain AUX programmable gain step size Input resistance Raux_in Aux-in Gain Accuracy AAUX(GA) Aux direct-to-out path, only Input gain = +9.0dB Input gain = +6.0dB Input gain = +3.0dB Input gain = 0dB -0.5dB +0.5dB - 12 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 6.3.2 Outputs Aux-out Conditions: VCCD = 3.3V, VCCA = VCCSPK = 5V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Parameter Full-scale output Signal-to-noise ratio 2Total harmonic distortion Symbol SNR THD+N Comments/Conditions Min Gain paths all at 0dB gain A-weighted RL = 5kΩ; full-scale signal A-weighted Typ VCCA / 3.3 85 -80 Max Units Vrms dB dB Digital to Analog Converter (DAC) driving AUXOUT with 5kΩ / 100pF load Conditions: VCCD = 3.3V, VCCA = VCCSPK = 3.3V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Parameter Full-scale output Signal-to-noise ratio Total harmonic distortion 2Symbol SNR THD+N Comments/Conditions Min Gain paths all at 0dB gain A-weighted RL = 5kΩ; full-scale signal A-weighted Typ VCCA / 3.3 80 -77 Max Units Vrms dB dB Digital to Analog Converter (DAC) driving AUXOUT with 5kΩ / 100pF load - 13 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 PWM OUTPUT Conditions: VCCD = 3.3V, VCCA = VCCSPK = 5V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Parameter Symbol Comments/Conditions Min Typ 65 -40 85 Max Units dB dB % Speaker PWM Output (SPK_PLUS / SPK_MINUS with 8Ω bridge-tied-load) Signal-to-noise ratio3 SNR A-weighted + Class D Filter 2Total harmonic distortion THD A-weighted + Class D Filter Efficiency EPWM 8Ω bridge-tied-load Pout > 0.2W Parameter Symbol Comments/Conditions Min Conditions: VCCD = 3.3V, VCCA = VCCSPK = 3.3V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Typ 65 -40 80 Max Units dB dB % Speaker PWM Output (SPK_PLUS / SPK_MINUS with 8Ω bridge-tied-load) 3Signal-to-noise ratio SNR A-weighted + Class D Filter 2Total harmonic distortion THD A-weighted + Class D Filter Efficiency EPWM 8Ω bridge-tied-load Pout > 0.2W - 14 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 CLASS-AB BTL OUTPUT Conditions: VCCD = 3.3V, VCCA = VCCSPK = 5V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Parameter Symbol Comments/Conditions Min Typ Max Units Vrms dB dB % Speaker CLASS-AB BTL Output (SPK_PLUS / SPK_MINUS with 8Ω bridge-tied-load) Full scale output Gain paths all at 0dB VCCA / 3.3 gain Signal-to-noise ratio 2Total harmonic distortion Efficiency SNR THD EAB A-weighted A-weighted 8Ω bridge-tied-load Pout > 0.7W 90 -60 50 Conditions: VCCD = 3.3V, VCCA = VCCSPK = 3.3V, MCLK = 16.384MHz, TA = +25°C, 1kHz signal Parameter Symbol Comments/Conditions Min Typ Max Units Vrms dB dB % Speaker CLASS-AB BTL Output (SPK_PLUS / SPK_MINUS with 8Ω bridge-tied-load) Full scale output Gain paths all at 0dB VCCA / 3.3 gain Signal-to-noise ratio 2Total harmonic distortion Efficiency SNR THD EAB A-weighted A-weighted 8Ω bridge-tied-load Pout > 0.4W 84 -60 50 Notes 1. 2. 3. Full Scale is relative to the magnitude of VCCA and can be calculated as FS = VCCA/3.3. Distortion is measured in the standard way as the combined quantity of distortion products plus noise. The signal level for distortion measurements is at 3dB below full scale, unless otherwise noted. SNR measured with a -100dbFS signal at input. - 15 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 6.3.3 SPI Timing TSSBHISSBTSSBSTSCK TSCKHTSCKL T SSBHTFALLTRISESCLKMOSITMOSTZMIDTMOH TCRBD TMIZDMISOTMID TRBCDRDY/BSYB Figure 6-2 SPI Timing SYMBOL TSCK TSCKH TSCKL TRISE TFALL TSSBS TSSBH TSSBHI TMOS TMOH TZMID TMIZD DESCRIPTION SCLK Cycle Time SCLK High Pulse Width SCLK Low Pulse Width Rise Time Fall Time SSB Falling Edge to 1 SCLK Falling Edge Setup Time stMIN 60 25 25 --- --- 30 TYP --- --- --- --- --- --- --- --- --- --- -- -- MAX --- --- --- 10 10 --- 50us --- --- --- 12 12 UNIT ns ns ns ns ns ns --- ns ns ns ns ns Last SCLK Rising Edge to SSB Rising Edge Hold 30ns Time SSB High Time between SSB Lows MOSI to SCLK Rising Edge Setup Time SCLK Rising Edge to MOSI Hold Time Delay Time from SSB Falling Edge to MISO Active Delay Time from SSB Rising Edge to MISO Tri-state 20 15 15 -- -- - 16 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 SYMBOL TMID TCRBD TRBCD 6.3.4 IS Timing 2DESCRIPTION Delay Time from SCLK Falling Edge to MISO Delay Time from SCLK Rising Edge to RDY/BSYB Falling Edge Delay Time from RDY/BSYB Rising Edge to SCLK Falling Edge MIN --- -- 0 TYP --- -- -- MAX 12 12 -- UNIT ns ns ns TSCKIS_SCKTWSHTWSSTSCKHTSCKL TWSHTFALLTRISETWSSIS_WSTSDISTSDIH 2IS_SDITSDODMSBLSBMSBIS_SDOMSBLSBMSBFigure 6-3 IS Timing SYMBOL TSCK TSCKH TSCKL TRISE TFALL DESCRIPTION IS_SCK Cycle Time IS_SCK High Pulse Width IS_SCK Low Pulse Width Rise Time Fall Time MIN 60 25 25 --- --- TYP --- --- --- --- --- MAX --- --- --- 10 10 UNIT ns ns ns ns ns - 17 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 SYMBOL TWSS TWSH TSDIS TSDIH TSDOD DESCRIPTION WS to IS_SCK Rising Edge Setup Time IS_SCK Rising Edge to IS_WS Hold Time IS_SDI to IS_SCK Rising Edge Setup Time IS_SCK Rising Edge to IS_SDI Hold Time Delay Time from IS_SCLK Falling Edge to IS_SDO MIN 20 20 15 15 --- TYP --- --- --- --- --- MAX --- --- --- --- 12 UNIT ns ns ns ns ns - 18 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

APPLICATION DIAGRAM - 19 - 芯天下--http://oneic.com/

ISD15D00 Revision 0.64 7 Publication Release Date: June 16, 2011 - 20 - 芯天下--http://oneic.com/

ISD15D00 Revision 0.64 Publication Release Date: June 16, 2011 ISD15D00 8 PACKAGE SPECIFICATION 8.1 QFN-32 (5X5 MM^2, THICKNESS 0.8MM ,PITCH 0.5 MM) 32251248179162532241178169 - 21 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 9 ORDERING INFORMATION I15D00 YYI Lead-Free Package Type Y: QFN-32 Y: Green (RoHS Compliant) I: Industrial -40 °C to 85°C - 22 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 10 Version 0.23 0.26 0.27 0.29 Date Aug 3, 2009 Aug 17, 2009 Sep 28, 2009 Nov 18, 2009 Description Initially released as the Preliminary Datasheet. Update application diagram. Update the list of supported Flash Memory. Update: • Block Diagram. • Electrical Characteristics. Add QFN-32 Package. Update block diagram. Update crystal configuration. Update PWM spec. Class-AB output delivers 0.7-watt at 4.5V. Update package information. Update description of Rise and Fall time. REVISION HISTORY 0.34 0.35 0.40 0.50 0.60 0.63 0.64 Dec 7, 2009 Feb 8, 2010 July 1, 2010 Aug 12, 2010 Mar 31, 2011 Apr 13, 2011 June 16, 2011 - 23 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/

ISD15D00 Nuvoton products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Furthermore, Nuvoton products are not intended for applications wherein failure of Nuvoton products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Nuvoton customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nuvoton for any damages resulting from such improper use or sales. The contents of this document are provided only as a guide for the applications of Nuvoton products. Nuvoton makes no representation or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to discontinue or make changes to specifications and product descriptions at any time without notice. No license, whether express or implied, to any intellectual property or other right of Nuvoton or others is granted by this publication. Except as set forth in Nuvoton's Standard Terms and Conditions of Sale, Nuvoton assumes no liability whatsoever and disclaims any express or implied warranty of merchantability, fitness for a particular purpose or infringement of any Intellectual property. The contents of this document are provided “AS IS”, and Nuvoton assumes no liability whatsoever and disclaims any express or implied warranty of merchantability, fitness for a particular purpose or infringement of any Intellectual property. In no event, shall Nuvoton be liable for any damages whatsoever (including, without limitation, damages for loss of profits, business interruption, loss of information) arising out of the use of or inability to use the contents of this documents, even if Nuvoton has been advised of the possibility of such damages. Application examples and alternative uses of any integrated circuit contained in this publication are for illustration only and Nuvoton makes no representation or warranty that such applications shall be suitable for the use specified. The 100-year retention and 100K record cycle projections are based upon accelerated reliability tests, as published in the Nuvoton Reliability Report, and are neither warranted nor guaranteed by Nuvoton. This datasheet and any future addendum to this datasheet is(are) the complete and controlling ISD® ChipCorder® product specifications. In the event any inconsistencies exist between the information in this and other product documentation, or in the event that other product documentation contains information in addition to the information in this, the information contained herein supersedes and governs such other information in its entirety. This datasheet is subject to change without notice. Copyright© 2005, Nuvoton Technology Corporation. All rights reserved. ChipCorder® and ISD® are trademarks of Nuvoton Technology Corporation. All other trademarks are properties of their respective owners. Headquarters Nuvoton Technology Corporation America Nuvoton Technology (Shanghai) Ltd. 27F, 299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62356998 No. 4, Creation Rd. III 2727 North First Street, San Jose, Science-Based Industrial Park, CA 95134, U.S.A. Hsinchu, Taiwan TEL: 1-408-9436666 TEL: 886-3-5770066 FAX: 1-408-5441797 FAX: 886-3-5665577 http://www.Nuvoton-usa.com/ http://www.Nuvoton.com.tw/ Taipei Office Nuvoton Technology Corporation Japan Nuvoton Technology (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 9F, No. 480, Pueiguang Rd. 7F Daini-ueno BLDG. 3-7-18 Neihu District Shinyokohama Kohokuku, Taipei, 114 Taiwan Yokohama, 222-0033 TEL: 886-2-81777168 TEL: 81-45-4781881 FAX: 886-2-87153579 FAX: 81-45-4781800 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. - 24 - Publication Release Date: June 16, 2011 Revision 0.64 芯天下--http://oneic.com/