1.evelop test plans,tests and verification infrastructure for complex ip's/sub-system/soc's
2.create verification environment for both directed and random verification
3.create reusable bus functional models,monitors,checkers and scoreboards
4.drive functional coverage driven verification closure
5.work with architects,designers and post-silicon teams
因篇幅问题不能全部显示,请点此查看更多更全内容
Copyright © 2019- huatuo0.com 版权所有 湘ICP备2023021991号-1
违法及侵权请联系:TEL:199 1889 7713 E-MAIL:2724546146@qq.com
本站由北京市万商天勤律师事务所王兴未律师提供法律服务